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Research outputs

Memory Efficient Hardware Architecture for 5/3 Lifting-Based 2-D Forward Discrete Wavelet Transform   [2021]

Savić, Goran  ; Prokin, Milan  ; Rajović, Associate Prof. Dr. Vladimir M.  ; Prokin, Dragana 

A performance evaluation of cache injection in bus-based shared memory multiprocessors   [2002]

Milenkovic, Aleksandar; Milutinovic, Veljko M 

CoNNa-Hardware accelerator for compressed convolutional neural networks   [2020]

Struharik, Rastislav J  ; Vukobratovic, Bogdan Z; Erdeljan, Andrea M; Rakanovic, Damjan M

Efficient one-dimensional forward and inverse discrete wavelet transformers   [2018]

Savić, Goran  ; Prokin, Milan  ; Rajović, Vladimir  ; Prokin, Dragana 

A hardware implementation of the mechanism of multiprocessing   [1999]

Tomasevic, Milo V  ; Bojovic, Marija; Djordjevic, Jovan

Disk interface comparison and operating system file-caching investigation   [2003]

Djordjevic, Borislav S  ; Miskovic, Stanislav

Hardware implementation of DIRLS mismatched compressor applied to a pulse-Doppler radar system   [2013]

Simić, Slobodan  ; Zejak, Aleksa  ; Golubičić, Zoran

A novel firefly algorithm approach for efficient feature selection with COVID-19 dataset   [2023]

N. Bacanin  ; K. Venkatachalam; T. Bezdan  ; M. Zivkovic  ; M. Abouhawwash

E2LP: A unified embedded engineering learning platform   [2014]

Kaštelan, Ivan  ; Lopez, Benito Jorge R.; Artetxe, Gonzalez Enara; Piwinski, Jan; Barak, Moshe; Temerinac, Miodrag 

Hardware acceleration of homogeneous and heterogeneous ensemble classifiers   [2015]

Vranjković, Vuk  ; Struharik, Rastislav  ; Novak, Ladislav A.

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