Претрага
Резултати
Efficient one-dimensional forward and inverse discrete wavelet transformers [2018]
Savić, GoranA Hardware Implemenation of the Mechanism of Multiprocessing [1999]
M. TomaševićAn improved algorithm for the estimation of the root mean square value as an optimal solution for commercial measurement equipment
[2024]
Bulat, Marina A performance evaluation of cache injection in bus-based shared memory multiprocessors [2002]
Milenkovic, Aleksandar; Milutinovic, Veljko MCoNNa-Hardware accelerator for compressed convolutional neural networks
[2020]
Struharik, Rastislav J A hardware implementation of the mechanism of multiprocessing [1999]
Tomasevic, Milo VA novel firefly algorithm approach for efficient feature selection with COVID-19 dataset
[2023]
N. Bacanin Hardware implementation of DIRLS mismatched compressor applied to a pulse-Doppler radar system [2013]
Simić, SlobodanDisk interface comparison and operating system file-caching investigation
[2003]
Djordjevic, Borislav S Memory Efficient Hardware Architecture for 5/3 Lifting-Based 2-D Forward Discrete Wavelet Transform [2021]
Savić, GoranFilters
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