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Browsing by Author Stojčev, Mile
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Issue Date | Title | Author(s) | Type | М-cat. |
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2013 | A 900 MHz Self-Tunable Narrowband Low-Noise Amplifier | Jovanović, Goran ![]() ![]() ![]() ![]() ![]() ![]() | Conference Paper | Mp. category will be shown later |
2010 | A CDMA and PAM Signaling Interconnect Architecture | Jovanović, Goran ![]() ![]() ![]() ![]() | Conference Paper | Mp. category will be shown later |
2011 | A class of fault-tolerant systolic arrays for matrix multiplication | Milovanović, Igor ![]() ![]() ![]() ![]() ![]() | Article | 21M21 |
2010 | A CMOS Voltage Controlled Ring Oscillator with Improved Frequency Stability | Jovanović, Goran ![]() ![]() | Article | Mp. category will be shown later |
2002 | A family of bidirectional systolic arrays for matrix-vector multiplication (✓) | Milovanović, Igor ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() | Conference Paper | Mp. category will be shown later |
2012 | A Fault-Tolerant Interconnections Using LCDMA and Duplication with Comparison Technique | Nikolić, Tatjana ![]() ![]() ![]() | Conference Paper | Mp. category will be shown later |
2012 | A fault-tolerant interconnections using LCDMA technique | Nikolić, Tatjana ![]() ![]() ![]() ![]() | Conference Paper | Mp. category will be shown later |
2022 | A Survey of Three Types of Processing Units: CPU, GPU and TPU (✓) | Nikolić, Goran ![]() ![]() ![]() ![]() ![]() ![]() ![]() | Conference Paper | Mp. category will be shown later |
2012 | A Unified Approach in Manipulation with Modular Arithmetic | Stojčev, Mile ![]() ![]() ![]() ![]() ![]() | Conference Paper | Mp. category will be shown later |
2013 | Active Time-slot Extension in Wireless Sensor Networks | Stojčev, Mile ![]() | Conference Paper | Mp. category will be shown later |
2011 | Address Generation Unit as Accelerator Block in DSP | Stojčev, Mile ![]() | Conference Paper | Mp. category will be shown later |
2009 | Address Generators for Linear Processor Array (✓) | Stojčev, Mile ![]() ![]() ![]() ![]() ![]() ![]() ![]() | Conference Paper | Mp. category will be shown later |
2010 | Address generators for linear systolic array | Stojčev, Mile ![]() ![]() ![]() ![]() ![]() ![]() ![]() | Article | 22M22 |
2009 | Address Generators Units for Bidirectional Linear Processor Array (✓) | Stojčev, Mile ![]() ![]() ![]() ![]() ![]() ![]() ![]() | Conference Paper | Mp. category will be shown later |
2011 | Adresni generator zasnovan na FPGA tehnologiji | Stojčev, Mile ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() | Technical reports | Mp. category will be shown later |
2006 | An Overview of On-Chip Buses (✓) | Stojčev, Mile ![]() ![]() ![]() | Article | Mp. category will be shown later |
2008 | An Overview of SoC Buses (✓) | Jovanović, Milica ![]() ![]() ![]() | Book parts | Mp. category will be shown later |
2014 | Application of t-Shuffle Permutation Matrices in Delta - Interconnection Networks | Milovanović, Igor ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() | Article | Mp. category will be shown later |
2014 | Application of t-Shuffle Permutation Matrices in Delta Interconnection Networks (✓) | Milovanovic, Igor ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() | Article | 52M52 |
2004 | Approach to partially self-checking combinational circuits design (✓) | Đorđević, Goran ![]() ![]() ![]() ![]() ![]() | Article | 22M22 |