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Browsing by Author Ienne Paolo

Showing results 1 to 9 of 9
Issue DateTitleAuthor(s)TypeМp-cat.
2022Detailed Placement for Dedicated LUT-Level FPGA InterconnectNikolic Stefan  ; Zgheib Grace; Ienne PaoloArticle
22M22
2024Exploring FPGA Switch-Blocks without Explicitly Listing Connectivity PatternsNikolic Stefan  ; Ienne PaoloArticle
21M21
2019Finding a Needle in the Haystack of Hardened Interconnect PatternsNikolic Stefan  ; Zgheib Grace; Ienne PaoloConference Paper
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2021Global Is the New Local: FPGA Architecture at 5nm and BeyondNikolić Stefan  ; Catthoor Francky; Tőkei Zsolt; Ienne PaoloConference Paper
Mp. category will be shown later
2019On Feasibility of FPGAs Without Dedicated Programmable Interconnect StructureKucherenko Anastasiia; Nikolic Stefan  ; Ienne PaoloConference Paper
Mp. category will be shown later
2023Regularity Matters: Designing Practical FPGA Switch-BlocksNikolic Stefan  ; Ienne PaoloConference Paper
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2020Straight to the Point: Intra- and Intercluster LUT Connections to Mitigate the Delay of Programmable RoutingNikolić Stefan  ; Zgheib Grace; Ienne PaoloConference Paper
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2020Timing-Driven Placement for FPGA Architectures with Dedicated Routing PathsNikolic Stefan  ; Zgheib Grace; Ienne PaoloConference Paper
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2021Turning PathFinder Upside-Down: Exploring FPGA Switch-Blocks by Negotiating Switch PresenceNikolic Stefan  ; Ienne PaoloConference Paper
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