Researchers



Results 61-67 of 67
Issue DateTitleAuthor(s)TypeМp-cat.
2007Project-based learning environment for special purpose DSP architecturesMilentijević, Ivan  ; Ćirić, Vladimir  Conference Paper
Mp. category will be shown later
2005Coefficient bit reordering method for configurable FIR filtering on folded bit-plane arrayĆirić, Vladimir  ; Milentijević, Ivan  Conference Paper
Mp. category will be shown later
2004Flexible folded FIR filter architectureMilentijević, Ivan  ; Ćirić, Vladimir  ; Vojinović, Oliver  Conference Paper
Mp. category will be shown later
2003Family of folded bit-serial multipliersĆirić, Vladimir  ; Milentijević, Ivan  ; Vojinović, Oliver  ; Tokić, Teufik  Conference Paper
Mp. category will be shown later
2002Synthesis of folded fully pipelined bit-plane architectureMilentijevic, Ivan  ; Nikolić, I; Ćirić, Vladimir  ; Vojinović, Oliver  ; Tokić, Teufik  Conference Paper
Mp. category will be shown later
2002Folded bit-plane FIR filter architecture with changeable folding factorMilentijević, Ivan  ; Ćirić, Vladimir  ; Tokić, Teufik  ; Vojinović, Oliver  Conference Paper
Mp. category will be shown later
1998Two-level pipelined systolic arrays for matrix-vector multiplicationMilentijević, Ivan  ; Milovanović, Igor  ; Milovanović, Emina  ; Tošić, Milorad  ; Stojčev, Mile Article
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