Researchers
Tomašević, Milo
Date issued
Date issued - custom
Results 21-40 of 40
Issue Date | Title | Author(s) | Type | Мp-cat. |
---|---|---|---|---|
2014 | Manual Parallelization versus State-of-the-art Parallelization Techniques: the SPEC CPU2006 as a Case Study | A. Vitorović; M. Tomašević ![]() ![]() | Article | 23M23 |
2013 | Evaluation and analysis of an on-line error detection monitoring technique | Punt, Marija ![]() ![]() ![]() ![]() | Article | 22M22 |
2013 | An analysis of chain characteristics in the cryptanalytic TMTO method![]() | Tomašević, Violeta ![]() ![]() ![]() ![]() | Article | 22M22 |
2012 | Data Sorting Using Graphics Processing Units | M. Mišić ![]() ![]() ![]() ![]() | Article | 53M53 |
2011 | Architecture of a System for Interactive Training and Testing in Algorithms and Data Structures | Đurđević, Đorđe ![]() ![]() ![]() | Article | Mp. category will be shown later |
2011 | Data sorting using graphics processing units | Mišić, Marko ![]() ![]() ![]() ![]() | Article | Mp. category will be shown later |
2010 | Pregled i analiza kriptoanalitičkih TMTO metoda | Tomašević, Violeta R. ![]() ![]() ![]() ![]() | Article | Mp. category will be shown later |
2006 | A Proposal for Register-level Communication in a Speculative Chip Multiprocessor | M. Radulović; M. Tomašević ![]() ![]() | Article | Mp. category will be shown later |
2006 | A Reflective Memory System for Personal Computers | M. Tomašević ![]() ![]() ![]() ![]() | Article | Mp. category will be shown later |
1999 | A RISC-Style Hardware Accelerator for Operating Systems | J. Đorđević; M. Bojović ![]() ![]() ![]() | Article | Mp. category will be shown later |
1999 | A hardware implementation of the mechanism of multiprocessing | Tomasevic, Milo V ![]() ![]() | Article | 22M22 |
1999 | The Interactive Development and Testing System for a RISC-Style Processor | M. Bojović ![]() ![]() ![]() | Article | 22M22 |
1999 | A Hardware Implemenation of the Mechanism of Multiprocessing | M. Tomašević ![]() ![]() ![]() | Article | 22M22 |
1998 | An Operating System Accelerator | J. Đorđević; M. Tomašević ![]() ![]() ![]() | Article | 23M23 |
1996 | Distributed Shared Memory: Concepts and Systems | J. Protić ![]() ![]() ![]() ![]() | Article | Mp. category will be shown later |
1996 | The Word-invalidate Cache Coherence Protocol | M. Tomašević ![]() ![]() | Article | Mp. category will be shown later |
1996 | A Simulation Study of Hardware-Oriented DSM Approaches | A. Grujić; M. Tomašević ![]() ![]() | Article | Mp. category will be shown later |
1995 | Improved RMS for the PC Environment | S. Savić; M. Tomašević ![]() ![]() | Article | Mp. category will be shown later |
1994 | Hardware Approaches to Cache Coherence in Shared-Memory Multiprocessors, Part 1 | M. Tomašević ![]() ![]() | Article | 22M22 |
1994 | Hardware Approaches to Cache Coherence in Shared-Memory Multiprocessors, Part 2 | M. Tomašević ![]() ![]() | Article | 22M22 |