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The asynchronous counterflow pipeline bit-serial multiplier (✓) [1998]
Tošić, Milorad![](/image/people_icon_ico.png)
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Exploring the performance of split data cache schemes on superscalar processors and symmetric multiprocessors [2005]
Sahuquillo, Julio; Petit, Salvador; Pont-Sanjuán, Ana; Milutinović, Veljko![](/image/people_icon_ico.png)
Worst-case traversal time analysis of TSN with multi-level preemption [2021]
Ojewale, Mubarak Adetunji; Yomsi, Patrick Meumeu; Nikolic, BorislavTwo-level pipelined systolic arrays for matrix-vector multiplication (✓) [1998]
Milentijević, Ivan![](/image/people_icon_ico.png)
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An Operating System Accelerator [1998]
J. Đorđević; M. Tomašević![](/image/people_icon_ico.png)
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Configurable folded array for FIR filtering [2008]
Ćirić, Vladimir![](/image/people_icon_ico.png)
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An exact comparison of global, partitioned, and semi-partitioned fixed-priority real-time multiprocessor schedulers [2021]
Burmyakov, Artem; Nikolic, BorislavA genetic simulation strategy: Application to single-fault analysis of TTEthernet synchronization protocol (✓) [2021]
Pavkovic, Bogdan![](/image/people_icon_ico.png)
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