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Резултати

The asynchronous counterflow pipeline bit-serial multiplier   [1998]

Tošić, Milorad  ; Stojčev, Mile ; Maksimović, Dejan; Đorđević, Goran  

Exploring the performance of split data cache schemes on superscalar processors and symmetric multiprocessors   [2005]

Sahuquillo, Julio; Petit, Salvador; Pont-Sanjuán, Ana; Milutinović, Veljko 

Worst-case traversal time analysis of TSN with multi-level preemption   [2021]

Ojewale, Mubarak Adetunji; Yomsi, Patrick Meumeu; Nikolic, Borislav

Two-level pipelined systolic arrays for matrix-vector multiplication   [1998]

Milentijević, Ivan  ; Milovanović, Igor  ; Milovanović, Emina  ; Tošić, Milorad  ; Stojčev, Mile 

An Operating System Accelerator   [1998]

J. Đorđević; M. Tomašević  ; M. Bojović ; V. Potić; S. Ranđić

Configurable folded array for FIR filtering   [2008]

Ćirić, Vladimir  ; Milentijević, Ivan  

A genetic simulation strategy: Application to single-fault analysis of TTEthernet synchronization protocol   [2021]

Pavkovic, Bogdan  ; Sandic, Miladin; Teslic, Nikola Dj  

An exact comparison of global, partitioned, and semi-partitioned fixed-priority real-time multiprocessor schedulers   [2021]

Burmyakov, Artem; Nikolic, Borislav

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