Đorđević, Goran

Type

Date issued

54 2000 - 2027
7 1900 - 1999

Mp-cat.

Date issued - custom

Year from:

Year to:

Results 41-60 of 61 Results/Page

Issue Date	Title	Author(s)	Type	Мp-cat.
2007	Micro-power simple processing element	Nikolić, Tatjana ; Djordjević, Goran ; Stojčev, Mile	Conference Paper	Mp. category will be shown later
2007	Low Power Application Specific Processing Element	Nikolić, Tatjana ; Đorđević, Goran ; Stojčev, Mile	Conference Paper	Mp. category will be shown later
2006	Approach to partially self-checking finite state machine design	Đorđević, Goran ; Stanković, Tatjana ; Stojčev, Mile	Conference Paper	Mp. category will be shown later
2005	Concurrent error detection in FSMs using transition checking technique	Đorđević, Goran ; Stanković, Tatjana ; Stojčev, Mile	Conference Paper	Mp. category will be shown later
2004	On VHDL Synthesis of Self-Checking Two-Level Combinational Circuits	Nikolić, Tatjana ; Stojčev, Mile ; Đorđević, Goran	Article	Mp. category will be shown later
2004	VHDL-Based design of FSM with concurrent error detection capability	Stojčev, Mile ; Đorđević, Goran ; Stanković, Tatjana	Conference Paper	Mp. category will be shown later
2004	Approach to partially self-checking combinational circuits design	Đorđević, Goran ; Stojčev, Mile ; Stanković, Tatjana	Article	22M22
2004	Implementation of self-checking two-level combinational logic on FPGA and CPLD circuits	Stojčev, Mile ; Đorđević, Goran ; Stanković, Tatjana	Article	22M22
2004	Design of Totally Self-Checking Combinational Circuits Based on VHDL Description	Nikolić, Tatjana ; Stojčev, Mile ; Đorđević, Goran	Article	Mp. category will be shown later
2003	Design of totally self-checking combinational circuits based on VHDL description	Nikolić, Tatjana ; Stojčev, Mile ; Đorđević, Goran	Conference Paper	Mp. category will be shown later
2003	On VHDL synthesis of self-checking two-level combinational circuits	Stanković, Tatjana ; Stojčev, Mile ; Đorđević, Goran	Conference Paper	Mp. category will be shown later
2003	Design of self-checking combinational circuits	Stanković, Tatjana ; Stojčev, Mile ; Đorđević, Goran	Conference Paper	Mp. category will be shown later
2001	Дигитална електроника и дигитална електронска кола - практикум за лабораторијске вежбе	Ђорђевић, Бранимир Ж.; Јевтић, Милун С.; Дамњановић, Милунка; Ђорђевић, Горан ; Велимировић, Андрија; Vučković, Jelena S.	Text book	Mp. category will be shown later
2000	Data reordering converter: an interface block in a linear chain of processing arrays	Stojčev, Mile ; Đorđević, Goran ; Milovanović, Emina ; Milovanović, Igor	Article	22M22
1998	The asynchronous counterflow pipeline bit-serial multiplier	Tošić, Milorad ; Stojčev, Mile ; Maksimović, Dejan; Đorđević, Goran	Article	23M23
1997	Asynchronous controller for token-ring mutual exclusion: Delay-insensitive arbiter cell	Tošić, Milorad ; Stojčev, Mile ; Đorđević, Goran	Conference Paper	Mp. category will be shown later
1997	Asynchronous controller for token-ring mutual exclusion: Ring design	Tošić, Milorad ; Stojčev, Mile ; Đorđević, Goran	Conference Paper	Mp. category will be shown later
1996	A compile-time scheduling heuristic for multiprocessor architectures	Đorđević, Goran ; Tošić, Milorad	Article	Mp. category will be shown later
1996	Дигитална електроника и дигитална електронска кола - практикум за лабораторијске вежбе	Đorđević, Branimir Ž.; Ђорђевић, Горан	Text book	Mp. category will be shown later
1996	A heuristic for scheduling task graphs with communication delays onto multiprocessors	Đorđević, Goran ; Tošić, Milorad	Article	Mp. category will be shown later