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Reconfigurable Low Power Architecture for Fault Tolerant Pseudo-Random Number Generation
| Title: | Reconfigurable Low Power Architecture for Fault Tolerant Pseudo-Random Number Generation | Authors: | SAVIĆ, NEMANJA; Stojčev, Mile |
Issue Date: | 2014 | Publication: | JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS | ISSN: | 0218-1266 Journal of Circuits Systems and Computers Search Idenfier |
Type: | Article | Collation: | vol. 23 br. 1 str. 1450002-1450002 | DOI: | 10.1142/s0218126614500029 | WoS-ID: | 000331282500002 | Scopus-ID: | 2-s2.0-84893814201 | URI: | https://enauka.gov.rs/handle/123456789/161709 | Project: | Serbian Ministry of Science and Technological Development "Low-Power Reconfigurable Fault-Tolerant Platforms" [TR-32009] | Metadata source: | Migracija | M-category: | 23M23 |
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