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A Module for Automatic Assessment and Verification of Students' Work in Digital Logic Design
Title: | A Module for Automatic Assessment and Verification of Students' Work in Digital Logic Design | Authors: | Stanisavljević, Žarko ; Nikolić, Boško ; Djordjevic, Jovan | Issue Date: | 2012 | Publication: | 2012 IEEE 19th International Conference and Workshops on Engineering of Computer-Based Systems | Type: | Conference Paper | DOI: | 10.1109/ecbs.2012.7 | WoS-ID: | 000308965100035 | Scopus-ID: | 2-s2.0-84862080725 | URI: | https://enauka.gov.rs/handle/123456789/365062 http://zaposleni.etf.bg.ac.rs/rest/sciNaucniRezultati/oai/record/3/703552 |
Metadata source: | Migrirano iz RIS podataka | M-category: | Mp. category will be shown later |
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