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Title: UART core bus functional model verification
Authors: Ilić, Velibor  ; Vladan Janičić; Milutin Sinđelić; Nebojša Pjevalica
Issue Date: 2015
Publication: 59. konferencija za elektroniku, telekomunikacije, računarstvo, automatiku i nuklearnu tehniku (ETRAN), 8-11 Jun 2015, Srebrno jezero, Srbija
Publisher: Društvo za ETRAN, Srebrno jezero, Srbija
Type: Conference Paper
ISBN: 978-86-80509-71-6 Search Idenfier
Collation: str. 1-4
URI: https://enauka.gov.rs/handle/123456789/446855
URL: http://etran.etf.rs/
Metadata source: Migrirano iz RIS podataka
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