Results
eNauka >
Results >
Memory Efficient Hardware Architecture for 5/3 Lifting-Based 2-D Forward Discrete Wavelet Transform
| Title: | Memory Efficient Hardware Architecture for 5/3 Lifting-Based 2-D Forward Discrete Wavelet Transform | Authors: | Savić, Goran |
Issue Date: | 2021 | Publication: | MICROPROCESSORS AND MICROSYSTEMS | ISSN: | 0141-9331 Microprocessors and Microsystems Search Idenfier |
Type: | Article | Collation: | vol. 87 br. 104176 str. 104176-104176 | DOI: | 10.1016/j.micpro.2021.104176 | WoS-ID: | 000712984700004 | Scopus-ID: | 2-s2.0-85117733221 | URI: | http://zaposleni.etf.bg.ac.rs/rest/sciNaucniRezultati/oai/record/2/708375 https://www.sciencedirect.com/science/article/abs/pii/S0141933121003446?via%3Dihub https://enauka.gov.rs/handle/123456789/525981 |
Metadata source: | Migracija | M-category: | 21M21 |
Items in eNauka are protected by copyright, with all rights reserved, unless otherwise indicated.