A Rocket Core with Radar Signal Processing Accelerators as Memory-Mapped I/O Devices

V. Milovanović; M. Petrović; V. Damnjanović; D. Petković; A. Kondić; V. Mihajlović; D. Tasovac; N. Petrović

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Title:	A Rocket Core with Radar Signal Processing Accelerators as Memory-Mapped I/O Devices
Authors:	V. Milovanović ; M. Petrović; V. Damnjanović; D. Petković; A. Kondić; V. Mihajlović; D. Tasovac; N. Petrović
Issue Date:	2024
Publication:	RISC-V Summit Europe
Type:	Conference Paper
URI:	http://zaposleni.etf.bg.ac.rs/rest/sciNaucniRezultati/oai/record/3/709840 https://enauka.gov.rs/handle/123456789/955818
M-category:	Mp. category will be shown later

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