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Research outputs
Mechanisms of positive gate bias stress induced instabilities in power VDMOSFETs
[2001]
Stojadinovic, Ninoslav D; Manic, Ivica Dj Low-frequency noise in thick-film structures caused by traps in glass barriers
[1998]
Mrak, Ivanka RF small signal avalanche for bipolar transistor circuit design: Characterization, modeling and repercussions [2011]
Milovanović, VladimirA method for separating the effects of interface from border and oxide trapped charge densities in MOS transistors [1997]
Savić, Z; Radjenovic, BRPATS – Reliable power aware time synchronization protocol [2014]
Kosanovic, Mirko R.; Stojčev, MileFault-tolerant TMR and DMR circuits with latchup protection switches [2014]
Petrović, V.; Schoof, G.; Stamenković, ZoranNBTI related degradation and lifetime estimation in p-channel power VDMOSFETs under the static and pulsed NBT stress conditions
[2011]
Manić, Ivica Recharging process of commercial floating-gate MOS transistor in dosimetry application
[2021]
Ilić, Stefan D. Implementation and evaluation of 2D SEC-DED forward error correction scheme in wireless sensor networks [2017]
Nikolić, GoranA review of pulsed NBTI in P-channel power VDMOSFETs
[2018]
Danković, Danijel Filters
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