Results
eNauka >
Results >
Trading Defect Tolerance for Chip Area in Nanotecnology Implementations of Systolic Arrays
| Title: | Trading Defect Tolerance for Chip Area in Nanotecnology Implementations of Systolic Arrays | Authors: | Ćirić, Vladimir   ; Simić, Vladimir ; Cvetković, Aleksandar ; Milentijević, Ivan |
Issue Date: | 2012 | Publication: | Proceedings of the Mediterranean Electrotechnical Conference - MELECON | Publisher: | IEEE Region 8, Hammamet, Tunisia | Type: | Conference Paper | ISBN: | 978-1-4673-0783-3  Search Idenfier |
Collation: | str. 1083-1086 | DOI: | 10.1109/MELCON.2012.6196616 | WoS-ID: | 000309215000233 | Scopus-ID: | 2-s2.0-84861490265 | URI: | https://enauka.gov.rs/handle/123456789/401660 https://machinery.mas.bg.ac.rs/handle/123456789/1591 |
URL: | http://www.melecon2012.org/ | Metadata source: | Migracija | M-category: | Mp. category will be shown later |
Altmetric
Dimensions
Unpaywall
Google ScholarTM
Items in eNauka are protected by copyright, with all rights reserved, unless otherwise indicated.