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eNauka >  Results >  Ultralow-Latency Hardware-in-the-Loop Platform for Rapid Validation of Power Electronics Designs
Title: Ultralow-Latency Hardware-in-the-Loop Platform for Rapid Validation of Power Electronics Designs
Authors: Majstorovic, Dusan; Celanovic, Ivan; Teslic, Nikola Dj.; Celanovic, Nikola; Katić, Vladimir 
Issue Date: 2011
Publication: IEEE Transactions on Industrial Electronics
ISSN: 0278-0046 IEEE Transactions on Industrial Electronics Search Idenfier
Type: Article
Collation: vol. 58 br. 10 str. 4708-4716
DOI: 10.1109/tie.2011.2112318
WoS-ID: 000294544700023
Scopus-ID: 2-s2.0-80052344994
URI: https://enauka.gov.rs/handle/123456789/403823
Metadata source: Migrirano iz RIS podataka
M-category: 
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