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Improve the automatic clock gating insertion in ASIC synthesis process using optimal enable function selection
| Title: | Improve the automatic clock gating insertion in ASIC synthesis process using optimal enable function selection | Authors: | Mihajlo Katona; Nikolić, Miloš |
Issue Date: | 2010 | Publication: | 5th European Conference on Circuits and Systems for Communications (ECCSC) | Publisher: | IEEE Circuits & Systems Society, Srbija | Type: | Conference Paper | ISBN: | 978-1-61284-400-8 Search Idenfier |
Collation: | str. 131-134 | URI: | https://enauka.gov.rs/handle/123456789/453085 | URL: | http://eccsc10.etf.rs/ | Metadata source: | Migrirano iz RIS podataka | M-category: | Mp. category will be shown later |
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