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Improve the automatic clock gating insertion in ASIC synthesis process using optimal enable function selection
| Naziv: | Improve the automatic clock gating insertion in ASIC synthesis process using optimal enable function selection | Autori: | Mihajlo Katona; Nikolić, Miloš   |
Godina: | 2010 | Publikacija: | 5th European Conference on Circuits and Systems for Communications (ECCSC) | Izdavač: | IEEE Circuits & Systems Society, Srbija | Tip rezultata: | Konferencijski rad | ISBN: | 978-1-61284-400-8  Pretraži identifikator |
Kolacija: | str. 131-134 | URI: | https://enauka.gov.rs/handle/123456789/453085 | URL: | http://eccsc10.etf.rs/ | Izvor metapodataka: | Migrirano iz RIS podataka | M-kategorija: | Mp kategorija će biti prikazana naknadno. |
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