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Implementation of the Verification process with Universal Verification Methodology in the Computer Systems for the VLSI course
Title: | Implementation of the Verification process with Universal Verification Methodology in the Computer Systems for the VLSI course | Authors: | M. Dodović ![]() ![]() ![]() ![]() ![]() ![]() |
Issue Date: | 2023 | Publication: | 2023 10th International Conference on Electrical, Electronic and Computing Engineering (IcETRAN) | Publisher: | IEEE | Type: | Conference Paper | Collation: | str. 1-5 | DOI: | 10.1109/IcETRAN59631.2023.10192233 | Scopus-ID: | 2-s2.0-85168409532 | URI: | http://zaposleni.etf.bg.ac.rs/rest/sciNaucniRezultati/oai/record/3/709193 https://ieeexplore.ieee.org/document/10192233 https://enauka.gov.rs/handle/123456789/778087 |
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