Implementation of the Verification process with Universal Verification Methodology in the Computer Systems for the VLSI course

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Naziv:	Implementation of the Verification process with Universal Verification Methodology in the Computer Systems for the VLSI course
Autori:	M. Dodović ; A. Srbljanović ; M. Mićović ; A. Rikalo; S. Stojanović
Godina:	2023
Publikacija:	2023 10th International Conference on Electrical, Electronic and Computing Engineering (IcETRAN)
Izdavač:	IEEE
Tip rezultata:	Konferencijski rad
Kolacija:	str. 1-5
DOI:	10.1109/IcETRAN59631.2023.10192233
Scopus-ID:	2-s2.0-85168409532
URI:	https://enauka.gov.rs/handle/123456789/778087 https://ieeexplore.ieee.org/document/10192233 http://zaposleni.etf.bg.ac.rs/rest/sciNaucniRezultati/oai/record/3/709193
M-kategorija:	Mp kategorija će biti prikazana naknadno.

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