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Browsing by Author Jovanović, Bojan
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| Issue Date | Title | Author(s) | Type | М-cat. |
|---|---|---|---|---|
| 2014 | A hybrid magnetic/complementary metal oxide semiconductor three-context memory bit cell for non-volatile circuit design | Jovanović, Bojan   ; Brum, R. M.; Torres, L. | Article | 21M21 |
| 2010 | An approach to Digital Low-Pass IIR Filter Design | Jovanović, Bojan ; Milun Jevtić | Conference Paper | Mp. category will be shown later |
| 2010 | An Improved Residue to Binary Converter Based on Mixed-Radix Conversion for the Moduli Set {2^(2n+1)−1,2^(2n),2^(n)−1} (✓) | Jovanović, Bojan ; Stamenkovic Negovan ; Stojanovic Vidosav | Conference Paper | Mp. category will be shown later |
| 2011 | Bežični upravljačko-nadzorni sistem mobilnih robota, tehničko rešenje | Jovanović, Bojan ; Milun Jevtić | Technical reports | Mp. category will be shown later |
| 2014 | Binary Division Power Models for High-Level Power Estimation of FPGA-Based DSP Circuits | Jovanović, Bojan ; Jevtic, Ruzica; Carreras, Carlos | Article | 21aM21a |
| 2015 | Comparative Analysis of MTJ/CMOS Hybrid Cells Based on TAS and In-Plane STT Magnetic Tunnel Junctions | Jovanović, Bojan ; Brum, Raphael M.; Torres, Lionel | Article | 22M22 |
| 2016 | Complexity analysis of the quadratic phase iir digital filters | Stančić, Goran ; Jovanović, Bojan ; Miljan Petrović | Conference Paper | Mp. category will be shown later |
| 2014 | Evaluation of hybrid MRAM/CMOS cells for normally-off and instant-on computing | Jovanović, Bojan ; Brum, Raphael M.; Torres, Lionel | Article | 23M23 |
| 2010 | FPGA implemantacija hibridnog on-line nadzora procesa za PC bazirane Real-Time sisteme | Jovanović, Bojan ; Milun Jevtić | Conference Paper | Mp. category will be shown later |
| 2011 | FPGA implementation of a hybrid on-line process monitoring in PC based real-time systems | Jovanović, Bojan ; Jevtic, Milun | Article | 51M51 |
| 2010 | FPGA implementation of throughput increasing techniques of the binary dividers | Jovanović, Bojan ; Milun Jevtić | Conference Paper | Mp. category will be shown later |
| 2012 | FPGA suited binary adder architecture | Jovanović, Bojan ; Milun Jevtić | Conference Paper | Mp. category will be shown later |
| 2012 | Methods for power minimisation in modern VLSI circuits | Jovanović, Bojan ; Jevtić, Milun | Article | Mp. category will be shown later |
| 2010 | One implementation of a Hybrid On-line process monitoring in PC based Real-Time Systems | Milun Jevtić; Jovanović, Bojan | Conference Paper | Mp. category will be shown later |
| 2013 | Optimization of the Binary Adder Architectures Implemented in ASICs and FPGAs | Jovanović, Bojan ; Jevtić, Milun | Article | Mp. category will be shown later |
| 2011 | Power estimation of dividers implemented in FPGAs | Jovanović, Bojan ; Ružica Jevtić; Carlos Carreras | Conference Paper | Mp. category will be shown later |
| 2011 | Reverse Conversion Design for the 4-Moduli Set {2n-1,2n,2n+1, 22n+1-1} (✓) | Jovanović, Bojan ; Negovan Stamenković | Article | 24M24 |
| 2010 | Reverse Conversion for Residue Number System Realizations of Digital Signal Processing Hardware (✓) | Jovanović, Bojan ; Stamenkovic Negovan ; Stojanovic Vidoslav | Conference Paper | Mp. category will be shown later |
| 2011 | Total Power Consumption in Modern VLSI Circuits | Jovanović, Bojan ; Milun Jevtić | Conference Paper | Mp. category will be shown later |
| 2010 | Triple-bit method for power estimation of nonlinear digital circuits in FPGAs | Jovanović, Bojan ; Jevtic, R.; Carreras, C. | Article | 22M22 |