Binary Division Power Models for High-Level Power Estimation of FPGA-Based DSP Circuits

Jovanović, Bojan; Jevtic, Ruzica; Carreras, Carlos

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Title:	Binary Division Power Models for High-Level Power Estimation of FPGA-Based DSP Circuits
Authors:	Jovanović, Bojan ; Jevtic, Ruzica; Carreras, Carlos
Issue Date:	2014
Publication:	IEEE Transactions on Industrial Informatics
ISSN:	1551-3203 IEEE Transactions on Industrial Informatics Search Idenfier
Type:	Article
Collation:	vol. 10 br. 1 str. 393-398
DOI:	10.1109/tii.2013.2261080
WoS-ID:	000336668600038
Scopus-ID:	2-s2.0-84898443609
URI:	https://enauka.gov.rs/handle/123456789/291844
Metadata source:	Migrirano iz RIS podataka
M-category:	21aM21a

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