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Binary Division Power Models for High-Level Power Estimation of FPGA-Based DSP Circuits
| Naziv: | Binary Division Power Models for High-Level Power Estimation of FPGA-Based DSP Circuits | Autori: | Jovanović, Bojan   ; Jevtic, Ruzica; Carreras, Carlos |
Godina: | 2014 | Publikacija: | IEEE Transactions on Industrial Informatics | ISSN: | 1551-3203 IEEE Transactions on Industrial Informatics Pretraži identifikator |
Tip rezultata: | Naučni članak | Kolacija: | vol. 10 br. 1 str. 393-398 | DOI: | 10.1109/tii.2013.2261080 | WoS-ID: | 000336668600038 | Scopus-ID: | 2-s2.0-84898443609 | URI: | https://enauka.gov.rs/handle/123456789/291844 | Izvor metapodataka: | Migrirano iz RIS podataka | M-kategorija: | 21a+M21a+ - Vodeći međunarodni časopis kategorije M21a+ |
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