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Title: FPGA suited binary adder architecture
Authors: Jovanović, Bojan  ; Milun Jevtić
Issue Date: 2012
Publication: Proceedings of 54th Conference for ETRAN
Publisher: ETRAN, Srbija
Type: Conference Paper
Collation: str. EL1.6-1-EL1.6-4
URI: https://enauka.gov.rs/handle/123456789/475093
Metadata source: Migrirano iz RIS podataka
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