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| Title: | An Efficient FPGA Implementation Of Floating Point Addition | Authors: | Pesic, Djordje; Ratkovic, Ivan | Issue Date: | 2015 | Publication: | 2015 23RD TELECOMMUNICATIONS FORUM TELFOR (TELFOR) | Type: | Conference Paper | Collation: | str. 685-688 | WoS-ID: | 000380397000154 | URI: | https://enauka.gov.rs/handle/123456789/809232 | Metadata source: | (Preuzeto iz Nasi u WoS) | M-category: | Mp. category will be shown later |
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