Efficient and realistic statistical worst case delay computation using VHDL

Sokolovic, Miljana; Litovski, Vanco B; Zwolinski, Mark

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Title:	Efficient and realistic statistical worst case delay computation using VHDL
Authors:	Sokolovic, Miljana; Litovski, Vanco B; Zwolinski, Mark
Issue Date:	2009
Publication:	ELECTRICAL ENGINEERING
ISSN:	0948-7921 Electrical Engineering Search Idenfier
Type:	Article
Collation:	vol. 91 br. 4-5 str. 197-210
DOI:	10.1007/s00202-009-0133-y
WoS-ID:	000272174100003
Scopus-ID:	2-s2.0-72149134630
URI:	https://enauka.gov.rs/handle/123456789/831364
Metadata source:	(Preuzeto iz Nasi u WoS)
M-category:	23M23

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